Exemplary embodiments of the present invention relate to a data output circuit for outputting data in various types of semiconductor chips.
FIG. 1 is a block diagram of a conventional data output circuit.
Referring to FIG. 1, the conventional data output circuit includes an output unit 110 and a pre-emphasis unit 120.
The output unit 110 includes an output driver configured to output data through a data pad. The output unit 110 includes a pull-up driver 111 and a pull-down driver 112.
The pull-up driver 111 is turned on when data P_DATA becomes a logic high level, and pulls up a data pad DQ. When the pull-up driver 111 pulls up the data pad DQ, the data pad DQ becomes a logic high level and high data is output. The pull-down driver 112 is turned on when data N_DATA becomes a logic low level, and pulls down the data pad DQ. When the pull-down driver 112 pulls down the data pad DQ, the data pad DQ becomes a logic low level and low data is output. Impedance codes PCODE<0:5> and NCODE<0:5> inputted to the pull-up driver 111 and the pull-down driver 112 are codes for calibrating resistances of the pull-up driver 111 and the pull-down driver 112. The impedance codes PCODE<0:5> and NCODE<0:5> are generated from a calibration circuit disposed near a ZQ pad (not shown). Specifically, which one of the pull-up driver 111 and the pull-down driver 112 of the output unit 110 is turned on is determined according to the logic values of the data P_DATA and N_DATA. The resistances of the pull-up driver 111 and the pull-down driver 112 when they are turned on are determined by the impedance codes PCODE<0:5> and NCODE<0:5>.
The pre-emphasis unit 120 performs a pre-emphasis operation which increases the drivability of output data upon transition of the data P_DATA and N_DATA. The pre-emphasis unit 120 includes a pull-up pre-emphasis driver 121 and a pull-down emphasis driver 122.
The pull-up emphasis driver 121 is turned on when emphasis data PPE_DATA is a logic high level, and drives the data pad DQ to a logic high level. The pull-down emphasis driver 122 is turned on when emphasis data NPE_DATA is a logic low level, and drives the data pad DQ to a logic low level. The emphasis data PPE_DATA has a logic high level when it transitions from a logic low level to a logic high level, and the emphasis data NPE_DATA has a logic low level when it transitions from a logic high level to a logic high level. The pre-emphasis unit 120 drives the data pad DQ together with the output unit 110 upon transition of the data P_DATA and N_DATA, thereby increasing the drivability of data. Codes PPRE<0:2> and NPRE<0:2> inputted to the pre-emphasis unit 120 are codes for setting the impedance of the pre-emphasis unit 120. The impedance of the pre-emphasis unit 120 is set by a mode register set (MRS). As the impedance of the pre-emphasis unit 120 is decreased, the pre-emphasis operation is increased. On the other hand, as the impedance of the pre-emphasis unit 120 is increased, the pre-emphasis operation is decreased.
FIG. 2 is a timing diagram illustrating the operation of the data output circuit of FIG. 1.
As can been seen from FIG. 2, the data P_DATA and N_DATA are driven to the data pad DQ by the pull-up driver 111 and the pull-down driver 112. In addition, the emphasis data PPE_DATA and NPE_DATA are activated during the transition of the data P_DATA and N_DATA, and the pre-emphasis unit 120 operates to improve driving the data of the data pad DQ.
When the pre-emphasis operation is applied to the output circuit, output data characteristics are greatly improved. However, the addition of the driver for the pre-emphasis operation increases the area of the output circuit and the capacitance of the output terminal, causing a slew rate reduction.